The MIIS Eprints Archive

Routing for analog chip designs at NXP Semiconductors

van den Akker, M and Beelen, T and Bisseling, R (2011) Routing for analog chip designs at NXP Semiconductors. [Study Group Report]



During the study week 2011 we worked on the question of how to automate certain aspects of the design of analog chips. Here we focused on the task of connecting different blocks with electrical wiring, which is particularly tedious to do by hand. For digital chips there is a wealth of research available for this, as in this situation the amount of blocks makes it hopeless to do the design by hand. Hence, we set our task to finding solutions that are based on the previous research, as well as being tailored to the specific setting given by NXP.
This resulted in an heuristic approach, which we presented at the end of the
week in the form of a protoype tool. In this report we give a detailed account of the ideas we used, and describe possibilities to extend the approach.

Item Type:Study Group Report
Problem Sectors:Discrete
Information and communication technology
Study Groups:European Study Group with Industry > ESGI 79 (Amsterdam, Netherlands, Jan 24-28, 2011) (SWI 2011)
Company Name:NXP
ID Code:590
Deposited By: Mark Curtis
Deposited On:29 Oct 2012 16:31
Last Modified:29 May 2015 20:12

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